Key facts
- Chinese chip design software firms are supporting Huawei's new "Tau Scaling Law".
- Empyrean Technology launched its Argus platform for 3D IC design, compatible with Huawei's methodology.
- Peking University developed a prototype EDA tool for Huawei's LogicFolding architecture.
- Huawei's "Tau Scaling Law" aims to improve chip performance by reducing signal travel time through vertical stacking.
- The approach seeks to circumvent US sanctions on advanced lithography equipment.
China's domestic chip design software industry is aligning behind Huawei Technologies' novel "Tau Scaling Law," a new chipmaking methodology designed to compete with leading global products. Empyrean Technology, a significant Chinese electronic design automation (EDA) provider, recently announced its Argus platform, a physical verification tool for three-dimensional integrated circuit (3D IC) design, which it has integrated into its expanding suite of tools. Empyrean described 3D IC technology as a crucial element for implementing Huawei's "Tau Scaling Law."
